# Circuit simulation with CSignal

**URL:** <https://clash-lang.discourse.group/t/circuit-simulation-with-csignal/109>\
**Category:** Clash Help\
**Created:** [March 25, 2026, 8:17pm UTC](https://clash-lang.discourse.group/t/circuit-simulation-with-csignal/109 "2026-03-25T20:17:25Z")\
**Posts on this page:** 4\
**Page:** 1

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**Author:** ![flyingcog](https://avatars.discourse-cdn.com/v4/letter/f/9dc877/32.png) [@flyingcog](https://clash-lang.discourse.group/u/flyingcog)\
**Post date:** [March 25, 2026, 8:17pm UTC](https://clash-lang.discourse.group/t/circuit-simulation-with-csignal/109/1 "2026-03-25T20:17:25Z")

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I have hard time understanding what should be the declaration of circuit.

I have component:

```haskell
myComponent :: (KnownNat ws, HiddenClockResetEnable dom) => Signal dom Bit -> Signal dom (Maybe (BitVector ws))
myCompoennt = _

```

If I use

```haskell
myComponentC :: (KnownNat ws, KnownDomain dom) => Circuit (CSignal dom Bit) (Df dom (BitVector ws))
myComponentC = fromSignals (\_ -> _ $ myComponent @ws @dom _) |> _

```

compiler complains about lack of clock/reset/enable signals. But if I add it to the signature I get complaints from simulation functions that they cannot prove `HiddenClockResetEnable`. Strangely they do have reset config. Additionally `Df` does have this signals but functions only work on `Df`.

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**Author:** ![lmbollen](https://yyz2.discourse-cdn.com/free1/user_avatar/clash-lang.discourse.group/lmbollen/32/10_2.png) [@lmbollen](https://clash-lang.discourse.group/u/lmbollen)\
**Post date:** [March 26, 2026, 11:12am UTC](https://clash-lang.discourse.group/t/circuit-simulation-with-csignal/109/2 "2026-03-26T11:12:23Z")

</div>

Hey!

It’s very important to realize there’s two ways of supplying clock, reset and enable signals to your circuit:

- The implicit way, through the `HiddenClockResetEnable` constraint. This is what you have in your first example.
- The explicit way, where you supply `Clock dom`, `Reset dom` and `Enable dom` as separate arguments.

Observe these two different `register` functions that live in different modules:  
[Clash.Prelude.register](https://hackage-content.haskell.org/package/clash-prelude-1.8.4/docs/Clash-Prelude.html#v:register) vs [Clash.Explicit.Prelude.register](https://hackage-content.haskell.org/package/clash-prelude-1.8.4/docs/Clash-Explicit-Signal.html#v:register)

In your second example, you only have the `KnownDomain` constraint on `dom`, but you should change it to `HiddenClockResetEnable dom` , which, besides constraining that it’s a `KnownDomain`, also now implicitly adds the control signals.

I hope that helps you! If not, could you provide how you are trying to use the simulation functions?

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<div class="post-metadata">

**Author:** ![flyingcog](https://avatars.discourse-cdn.com/v4/letter/f/9dc877/32.png) [@flyingcog](https://clash-lang.discourse.group/u/flyingcog)\
**Post date:** [March 26, 2026, 8:54pm UTC](https://clash-lang.discourse.group/t/circuit-simulation-with-csignal/109/3 "2026-03-26T20:54:51Z")

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I was talking about simulation functions from clash-protocols.

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<div class="post-metadata">

**Author:** ![Rowan](https://yyz2.discourse-cdn.com/free1/user_avatar/clash-lang.discourse.group/rowan/32/24_2.png) [@Rowan](https://clash-lang.discourse.group/u/Rowan)\
**Post date:** [March 30, 2026, 9:29am UTC](https://clash-lang.discourse.group/t/circuit-simulation-with-csignal/109/4 "2026-03-30T09:29:41Z")

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Your circuit takes no clock/reset/enable. It’s not really clear which simulation functions you are talking about as there a few different ones. Some expecting a circuit with clock, reset, enable inputs and others that don’t. For example `[simulateCS](https://github.com/clash-lang/clash-protocols/blob/main/clash-protocols/src/Protocols/Internal.hs#L428C1-L428C11)`vs`[`simulateCSE`](https://github.com/clash-lang/clash-protocols/blob/main/clash-protocols/src/Protocols/Internal.hs#L443)which do similar things with the only difference is that `simulateCSE`expects a circuit that has clock, reset and enable inputs.