# Clash Help **URL:** https://clash-lang.discourse.group/c/clash-help/4.md [Latest](https://clash-lang.discourse.group/latest.md) · [Categories](https://clash-lang.discourse.group/categories.md) · [Tags](https://clash-lang.discourse.group/tags.md) --- ## [Welcome to Clash Language Community! 👋](https://clash-lang.discourse.group/t/welcome-to-clash-language-community/5)
**Author:** [@system](https://clash-lang.discourse.group/u/system)\ **Replies:** 0\ **Last updated:** [January 19, 2024, 5:31am UTC](https://clash-lang.discourse.group/t/welcome-to-clash-language-community/5 "2024-01-19T05:31:38Z")
We are happy to have you here on the Clash Forums :slight\_smile: This is a space to share your Clash projects, ask questions and get technical help, as well as chat and get to know other community members! Here are som… --- ## [About the Clash Help category](https://clash-lang.discourse.group/t/about-the-clash-help-category/3)
**Author:** [@system](https://clash-lang.discourse.group/u/system)\ **Replies:** 0
Create topics here about all your questions about Clash or Clash tooling! --- ## [Clash Shockwaves simulation hang](https://clash-lang.discourse.group/t/clash-shockwaves-simulation-hang/117)
**Author:** [@east710](https://clash-lang.discourse.group/u/east710)\ **Replies:** 10\ **Last updated:** [August 4, 2026, 2:27pm UTC](https://clash-lang.discourse.group/t/clash-shockwaves-simulation-hang/117 "2026-08-04T14:27:45Z")
I’m writing a testbench for the uart module provided by Retroclash to get more familiar with Shockwave. It’s as follow {-# OPAQUE topEntity #-} {-# ANN topEntity (Synthesize { t\_name = "topEntity" , t\_inputs =… --- ## [Stateful simulation](https://clash-lang.discourse.group/t/stateful-simulation/101)
**Author:** [@t-wallet](https://clash-lang.discourse.group/u/t-wallet)\ **Replies:** 11\ **Last updated:** [May 24, 2026, 9:58am UTC](https://clash-lang.discourse.group/t/stateful-simulation/101 "2026-05-24T09:58:44Z")
I was wondering if there are any ways to do stateful simulation in Clash already. With stateful simulation I mean being able to run one clock cycle at a time: feeding the inputs, checking the outputs, then determine what… --- ## [Simulation just hangs](https://clash-lang.discourse.group/t/simulation-just-hangs/111)
**Author:** [@flyingcog](https://clash-lang.discourse.group/u/flyingcog)\ **Replies:** 6\ **Last updated:** [April 9, 2026, 8:12am UTC](https://clash-lang.discourse.group/t/simulation-just-hangs/111 "2026-04-09T08:12:29Z")
I’m trying to include a pipeline inside the Df stream. I’m trying to write: delayToDf' :: forall dom delay a b. (HasCallStack, HiddenClockResetEnable dom, KnownNat delay, NFDataX a, NFDataX b) =\>… --- ## [Circuit simulation with CSignal](https://clash-lang.discourse.group/t/circuit-simulation-with-csignal/109)
**Author:** [@flyingcog](https://clash-lang.discourse.group/u/flyingcog)\ **Replies:** 3\ **Last updated:** [March 30, 2026, 9:29am UTC](https://clash-lang.discourse.group/t/circuit-simulation-with-csignal/109 "2026-03-30T09:29:41Z")
I have hard time understanding what should be the declaration of circuit. I have component: myComponent :: (KnownNat ws, HiddenClockResetEnable dom) =\> Signal dom Bit -\> Signal dom (Maybe (BitVector ws)) myCompoennt = … --- ## [Unclear unsafeFromMaybe](https://clash-lang.discourse.group/t/unclear-unsafefrommaybe/108)
**Author:** [@flyingcog](https://clash-lang.discourse.group/u/flyingcog)\ **Replies:** 3\ **Last updated:** [March 26, 2026, 11:15am UTC](https://clash-lang.discourse.group/t/unclear-unsafefrommaybe/108 "2026-03-26T11:15:48Z")
I have hard time understanding what is meant by “Note that this circuit needs a clock to latch the incoming Maybe values in case of backpressure from the RHS”. Does it mean: Signal needs to be clocked to domain clock i… --- ## [Blinking light n times](https://clash-lang.discourse.group/t/blinking-light-n-times/106)
**Author:** [@east710](https://clash-lang.discourse.group/u/east710)\ **Replies:** 3\ **Last updated:** [March 25, 2026, 10:17am UTC](https://clash-lang.discourse.group/t/blinking-light-n-times/106 "2026-03-25T10:17:57Z")
I’m working through the Retroprogramming with Clash book and am currently stuck on the blinking light n times problem. Not sure what’s wrong with my current solution as it’s not blinking at all. Any hints or tips would b… --- ## [Clash-protocols fails to build](https://clash-lang.discourse.group/t/clash-protocols-fails-to-build/107)
**Author:** [@flyingcog](https://clash-lang.discourse.group/u/flyingcog)\ **Replies:** 2\ **Last updated:** [March 24, 2026, 10:32pm UTC](https://clash-lang.discourse.group/t/clash-protocols-fails-to-build/107 "2026-03-24T22:32:44Z")
I followed the documentation of clash-protocols but when I try to add it as dependency I get: % nix log /nix/store/p1r6jx75y3d4qbpdma4d5a0z5n4ywzqn-clash-protocols-0.1.drv Running phase: setupCompilerEnvironmentPhase @n… --- ## [How to handle undefined](https://clash-lang.discourse.group/t/how-to-handle-undefined/105)
**Author:** [@flyingcog](https://clash-lang.discourse.group/u/flyingcog)\ **Replies:** 4\ **Last updated:** [March 17, 2026, 2:21am UTC](https://clash-lang.discourse.group/t/how-to-handle-undefined/105 "2026-03-17T02:21:29Z")
I have a function that I would handle undefined in. Something like: foo :: MyType -\> State X () foo mt | isUndefined mt = do x .= undefined y .= undefined foo (A a) = x .= a foo (B b) = y .= b Howev… --- ## [We’d love your feedback on using Clash](https://clash-lang.discourse.group/t/we-d-love-your-feedback-on-using-clash/103)
**Author:** [@Rowan](https://clash-lang.discourse.group/u/Rowan)\ **Replies:** 3\ **Last updated:** [February 25, 2026, 6:19am UTC](https://clash-lang.discourse.group/t/we-d-love-your-feedback-on-using-clash/103 "2026-02-25T06:19:48Z")
The Clash compiler team is actively looking to better understand how Clash is used in practice and where it can be improved. We’re especially interested in hearing from the community about anything that gets in the way o… --- ## [Best way to get pretty waveforms? / issues with dumpVCD](https://clash-lang.discourse.group/t/best-way-to-get-pretty-waveforms-issues-with-dumpvcd/104)
**Author:** [@bry](https://clash-lang.discourse.group/u/bry)\ **Replies:** 3\ **Last updated:** [February 2, 2026, 10:16am UTC](https://clash-lang.discourse.group/t/best-way-to-get-pretty-waveforms-issues-with-dumpvcd/104 "2026-02-02T10:16:40Z")
Is there a native way to produce nice VCD/FST waveforms with reasonably readable annotations for my native Clash tests? I know I can compile Clash to a Verilog test bench and write up a test harness for that, but I’ve he… --- ## [deriveAutoReg with superclass constraints](https://clash-lang.discourse.group/t/deriveautoreg-with-superclass-constraints/100)
**Author:** [@elliotpotts](https://clash-lang.discourse.group/u/elliotpotts)\ **Replies:** 4\ **Last updated:** [December 4, 2025, 6:14pm UTC](https://clash-lang.discourse.group/t/deriveautoreg-with-superclass-constraints/100 "2025-12-04T18:14:37Z")
I would like to use deriveAutoReg but my type requires a KnownFoo superclass constraint e.g.: data MsgConfig = MsgConfig { \_msgChannelWidth :: Nat } type family MsgChannelWidth (cfg :: MsgConfig) :: Nat where Msg… --- ## [Initializing one word of asyncRam](https://clash-lang.discourse.group/t/initializing-one-word-of-asyncram/94)
**Author:** [@bry](https://clash-lang.discourse.group/u/bry)\ **Replies:** 4\ **Last updated:** [November 25, 2025, 7:51pm UTC](https://clash-lang.discourse.group/t/initializing-one-word-of-asyncram/94 "2025-11-25T19:51:14Z")
I’m looking to implement a register file with a zero register. In previous Verilog projects, I found the most performant way to do this was to make an asynchronous RAM initialized to have 0 in the zero-register position … --- ## [Re-creating a stalling property test](https://clash-lang.discourse.group/t/re-creating-a-stalling-property-test/99)
**Author:** [@harris-chris](https://clash-lang.discourse.group/u/harris-chris)\ **Replies:** 3\ **Last updated:** [November 18, 2025, 3:02pm UTC](https://clash-lang.discourse.group/t/re-creating-a-stalling-property-test/99 "2025-11-18T15:02:07Z")
Hello all I have been trying to figure out a slightly elusive bug. One of my hedgehog property tests (that uses the clash Hedgehog test harness) is stalling - as in, the test is going on for ever and not getting anywher… --- ## [Lsp for shake based project](https://clash-lang.discourse.group/t/lsp-for-shake-based-project/98)
**Author:** [@jerg](https://clash-lang.discourse.group/u/jerg)\ **Replies:** 1\ **Last updated:** [November 13, 2025, 1:04pm UTC](https://clash-lang.discourse.group/t/lsp-for-shake-based-project/98 "2025-11-13T13:04:24Z")
I’m trying to set up a clash project using shake like this: GitHub - gergoerdi/retroclash-book-code: Small example programs from the RetroClash book But I have trouble getting the lsp to work. I assume that I’ll need to… --- ## [How to dynamically shift a BitVector?](https://clash-lang.discourse.group/t/how-to-dynamically-shift-a-bitvector/93)
**Author:** [@keszocze](https://clash-lang.discourse.group/u/keszocze)\ **Replies:** 6\ **Last updated:** [October 31, 2025, 1:52pm UTC](https://clash-lang.discourse.group/t/how-to-dynamically-shift-a-bitvector/93 "2025-10-31T13:52:19Z")
I am trying to implement a simple processor that should support shifts. I did not find anything helpful in the documentary of BitVector or Bits so I checked how other people do this (e.g., here or here). The trick seems … --- ## [Floating points?](https://clash-lang.discourse.group/t/floating-points/96)
**Author:** [@fossy](https://clash-lang.discourse.group/u/fossy)\ **Replies:** 2\ **Last updated:** [October 28, 2025, 8:05am UTC](https://clash-lang.discourse.group/t/floating-points/96 "2025-10-28T08:05:36Z")
Hi all, I’m working on some DSP stuff and noticed that floating point primitives were missing. I understand the rationale for this given in the documentation. There is growing support for floating points in various shap… --- ## [Test bench rapidly consuming all of my memory](https://clash-lang.discourse.group/t/test-bench-rapidly-consuming-all-of-my-memory/95)
**Author:** [@bry](https://clash-lang.discourse.group/u/bry)\ **Replies:** 2\ **Last updated:** [October 17, 2025, 11:14am UTC](https://clash-lang.discourse.group/t/test-bench-rapidly-consuming-all-of-my-memory/95 "2025-10-17T11:14:09Z")
I have a few simple modules and a test bench I’ve put together, all non-recursive: module CPU.Forward where import Clash.Prelude -- Forwards non-zero-register incoming data in place of original data when -- register n… --- ## [VSCode integration with Clash - Failed to parse result of calling cabal; also a build error on Clash Cabal package](https://clash-lang.discourse.group/t/vscode-integration-with-clash-failed-to-parse-result-of-calling-cabal-also-a-build-error-on-clash-cabal-package/92)
**Author:** [@bry](https://clash-lang.discourse.group/u/bry)\ **Replies:** 6\ **Last updated:** [October 12, 2025, 1:34am UTC](https://clash-lang.discourse.group/t/vscode-integration-with-clash-failed-to-parse-result-of-calling-cabal-also-a-build-error-on-clash-cabal-package/92 "2025-10-12T01:34:13Z")
Continuing to try to work through the Clash.Tutorial examples - my VSCode Haskell extension is failing with the following error: Failed to parse result of calling cabal Failed command: cabal --builddir=/home/bry/.cache/… --- ## [Infinite recursion error in tutorial code](https://clash-lang.discourse.group/t/infinite-recursion-error-in-tutorial-code/91)
**Author:** [@bry](https://clash-lang.discourse.group/u/bry)\ **Replies:** 2\ **Last updated:** [October 10, 2025, 4:44am UTC](https://clash-lang.discourse.group/t/infinite-recursion-error-in-tutorial-code/91 "2025-10-10T04:44:03Z")
I’m trying to work through the tutorial Clash.Tutorial , and I’m encountering the following issue when trying to run :verilog or :vhdl after adding the test-bench segment: \*\*\* Exception: Hit specialization limit 20 on f… --- ## [Is \`clash\` able to generate module with constant parameters to be determined in vivado top entity?](https://clash-lang.discourse.group/t/is-clash-able-to-generate-module-with-constant-parameters-to-be-determined-in-vivado-top-entity/89)
**Author:** [@astrojhgu](https://clash-lang.discourse.group/u/astrojhgu)\ **Replies:** 3\ **Last updated:** [August 7, 2025, 9:43am UTC](https://clash-lang.discourse.group/t/is-clash-able-to-generate-module-with-constant-parameters-to-be-determined-in-vivado-top-entity/89 "2025-08-07T09:43:20Z")
Hi, I’m new to clash and have some maybe stupid questions: Is clash able to generate verilog that contains modules with constant parameters that is to be determined in vivado top module? Thanks. --- ## [Laziness in prod3C](https://clash-lang.discourse.group/t/laziness-in-prod3c/85)
**Author:** [@elliotpotts](https://clash-lang.discourse.group/u/elliotpotts)\ **Replies:** 6\ **Last updated:** [June 18, 2025, 6:34pm UTC](https://clash-lang.discourse.group/t/laziness-in-prod3c/85 "2025-06-18T18:34:42Z")
While writing some code that uses clash-protocols, I implemented prod3C in the expected way: prod3C :: Circuit a b -\> Circuit c d -\> Circuit e f -\> Circuit (a, c, e) (b, d, f) prod3C (Circuit x) (Circuit y) (Cir… --- ## [Circuit notation for cyclic circuits](https://clash-lang.discourse.group/t/circuit-notation-for-cyclic-circuits/82)
**Author:** [@cactus](https://clash-lang.discourse.group/u/cactus)\ **Replies:** 6\ **Last updated:** [May 19, 2025, 10:44am UTC](https://clash-lang.discourse.group/t/circuit-notation-for-cyclic-circuits/82 "2025-05-19T10:44:34Z")
I’m trying to use clash-protocols’s circuit notation to describe a circuit which has two-way communication between component1 and component2: +---+ +---+ | | ---\> | | +---\> | 1 | … --- ## [How to avoid flattening of fields in Record?](https://clash-lang.discourse.group/t/how-to-avoid-flattening-of-fields-in-record/79)
**Author:** [@Bipinoli](https://clash-lang.discourse.group/u/Bipinoli)\ **Replies:** 3\ **Last updated:** [May 14, 2025, 4:24pm UTC](https://clash-lang.discourse.group/t/how-to-avoid-flattening-of-fields-in-record/79 "2025-05-14T16:24:12Z")
Hi, for the code below: module Spec where import Clash.Prelude import Clash.Annotations.TopEntity data ValidInt = ValidInt { value :: Int, valid :: Bool } deriving (Generic, NFDataX) data Inputs = Inputs { … --- ## [Is there an upper limit to the number of items in tuple?](https://clash-lang.discourse.group/t/is-there-an-upper-limit-to-the-number-of-items-in-tuple/78)
**Author:** [@Bipinoli](https://clash-lang.discourse.group/u/Bipinoli)\ **Replies:** 6\ **Last updated:** [May 10, 2025, 10:47am UTC](https://clash-lang.discourse.group/t/is-there-an-upper-limit-to-the-number-of-items-in-tuple/78 "2025-05-10T10:47:24Z")
Clash fails to compile when using tuples larger than size 12. This seems somewhat arbitrary. My guess is that Clash defines bundle and unbundle functions only for tuples up to a certain size—possibly 12—and lacks suppor… --- ## [\`Circuit\` currying](https://clash-lang.discourse.group/t/circuit-currying/74)
**Author:** [@rslawson](https://clash-lang.discourse.group/u/rslawson)\ **Replies:** 4\ **Last updated:** [April 25, 2025, 11:37pm UTC](https://clash-lang.discourse.group/t/circuit-currying/74 "2025-04-25T23:37:51Z")
I don’t have a particular use case for it now, but I mistakenly thought I did a moment ago. Anywho, I’m curious - is there a way to write some function that allows for something like curryCircuit2 :: forall a b c. F… --- ## [Register signal from applicative functor is not calculated](https://clash-lang.discourse.group/t/register-signal-from-applicative-functor-is-not-calculated/75)
**Author:** [@Bipinoli](https://clash-lang.discourse.group/u/Bipinoli)\ **Replies:** 2\ **Last updated:** [April 24, 2025, 11:39am UTC](https://clash-lang.discourse.group/t/register-signal-from-applicative-functor-is-not-calculated/75 "2025-04-24T11:39:50Z")
Hi, for the circuit: module Debug where import Clash.Prelude type Input = (Bool, Bool) func :: HiddenClockResetEnable dom =\> Signal dom Input -\> Signal dom Int func input = cursor where cursor = register… --- ## [Hanging while testing clash-protocols code](https://clash-lang.discourse.group/t/hanging-while-testing-clash-protocols-code/70)
**Author:** [@harris-chris](https://clash-lang.discourse.group/u/harris-chris)\ **Replies:** 16\ **Last updated:** [February 14, 2025, 3:43pm UTC](https://clash-lang.discourse.group/t/hanging-while-testing-clash-protocols-code/70 "2025-02-14T15:43:23Z")
Hello all, I was wondering if I could ask for some help on the following issue. I have a trivial topEntity function, using clash-protocols, that plugs into an Axi 4 Stream: roundTripTopEntity :: Clock System … --- ## [Generated verilog code is working funny for +\>\> on Vec](https://clash-lang.discourse.group/t/generated-verilog-code-is-working-funny-for-on-vec/67)
**Author:** [@Bipinoli](https://clash-lang.discourse.group/u/Bipinoli)\ **Replies:** 6\ **Last updated:** [February 9, 2025, 7:05pm UTC](https://clash-lang.discourse.group/t/generated-verilog-code-is-working-funny-for-on-vec/67 "2025-02-09T19:05:14Z")
Hi, I ran into a weird case while trying to create a FIFO queue. Simulation in Haskell works correctly, but when testing the generated Verilog code with testbench I get the nonsensical outputs. I have tried to isolate on… [Next page](https://clash-lang.discourse.group/c/clash-help/4.md?page=1)